CHIPS Manufacturing USA Institute Competition

Semiconductors are arguably the smallest, most complex products ever made in one of the world’s most sophisticated manufacturing environments. Although U.S. innovation created the sector, domestic manufacturing currently accounts for about 12% of global production, compared to 37% approximately thirty years ago.3 To improve its manufacturing competitiveness, the United States must address key challenges, such as the time and cost of chip development and manufacturing processes, as well as talent shortages.

Digital twins offer a critical tool for the United States to achieve technology leadership and accelerate ideas to market across the semiconductor sector. As recently defined by the National Academies of Sciences, Engineering, and Medicine:

A digital twin is a set of virtual information constructs that mimics the structure, context, and behavior of a natural, engineered, or social system (or system-of-systems), is dynamically updated with data from its physical twin, has a predictive capability, and informs decisions that realize value. The bidirectional interaction between the virtual and the physical is central to the digital twin.4

Digital twin technologies can significantly impact both current and future semiconductor manufacturing, advanced packaging, assembly, and test processes. Leading companies have therefore developed and deployed proprietary digital twins and resources to optimize key process steps and increase throughput. However, despite substantial investments in proprietary semiconductor digital twin technologies, multiple challenges hinder the development of breakthrough innovations using digital twins, including:

  • Fragmentation, where companies each develop separate digital twins, limiting process optimization to a single tool or suite of tools rather than across the full manufacturing flow.
  • Lack of transparency and trust, where companies are unwilling to share critical assets (e.g., models, data, and best practices related to their digital twins) outside of their supply chain.
  • High barriers to entry, where high equipment and facilities costs, along with the difficulty of testing and validating digital twins in a full process flow, limit small business participation.

By convening the manufacturing ecosystem to solve shared technology challenges, a new Manufacturing USA Institute aims to unlock the full potential of digital twins for the semiconductor industry and benefit manufacturers of all sizes.


Program Name: CHIPS Manufacturing USA Institute Competition

Solicitation Number: 2024-NIST-CHIPS-MFGUSA-01

Topic Description: Digital Twins

Deadline: June 20, 2024 (Concept Paper)

Sponsor: National Institute of Standards and Technology (NIST), United States Department of Commerce

Anticipated Budget: First Year: $285 Million for a single award




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